Switching regulator

ABSTRACT

Provided is a switching regulator which is capable of reducing soft start time when being activated, and prolonging battery life. The switching regulator has a configuration in which a clamp circuit for clamping a reference voltage is provided in a soft start circuit, and a predetermined period of time since the switching regulator has been activated is divided into a plurality of segments to increase the reference voltage with different slopes for each of the plurality of segments. At an early stage of the activation, the reference voltage is set to be low for preventing an inrush current from a power source, and thereafter, a rate of increase in reference voltage is gradually increased, to thereby reduce the soft start time.

INTRODUCTION

In order to reduce an inrush current from a primary power source or an overshoot of an output voltage, an output voltage of an error amplifier is gradually raised in a current mode DC-DC converter. This time period is called a soft start, which requires several mS to 10 mS. The output voltage of the error amplifier becomes an input of a comparator. To another input of the comparator, switching current information of a coil subjected to voltage conversion is supplied. Portable electronic devices have a stand-by mode to suspend an operation of a stabilized power supply for prolonging a battery operation time thereof. High-speed switchover from the stand-by mode to an operation mode enables a stand-by mode operation with high frequency, and thus has a large power saving effect. Therefore, a reduction in soft start time is an important object for reducing a recovery time from the stand-by mode. The present invention provides a current mode DC-DC converter which raises, when a power source is turned on or a mode of the power source is switched from the stand-by mode to the operation mode, an output voltage to a predetermined output voltage over a short soft start time while suppressing an input inrush current and also an overshoot voltage output. According to the present invention, the soft start time of the current mode DC-DC converter is not affected by variations in load current, operating voltage, operating temperature, and IC manufacturing process, and hence stable high-speed soft start characteristics can be obtained.

FIGS. 1 illustrate typical output voltage, load current, and coil current characteristics of a current mode DC-DC converter without a soft start circuit.

It is observed that an input inrush current of 3.5 A flows immediately after the power source is turned on, and an overshoot occurs up to a potential twice or more as much as that of an output voltage of 0.8 V.

2. CONVENTINAL SOFT START

As a way of gradually increasing anoutput of anerror amplifier, the output of the amplifier is forcibly clamped by an added circuit. In this technique, a reference voltage which is an input of the error amplifier is compared with a potential obtained by dividing an output voltage of a switching power source. Accordingly, a clamp circuit needs to be disconnected when both potentials are equal to each other. FIG. 2 illustrates an example thereof. Reference numerals 27, 19, 37, 36, and 38 denote an error amplifier, a comparator, a pnp transistor, a capacitor, and a constant current circuit, respectively. When a power source input +V_(IN) is applied, a potential of the capacitor is gradually increased from zero by means of the constant current circuit. The output of the error amplifier is clamped to a potential obtained by adding V_(BE) of the pnp transistor to the potential of the capacitor, whereby the potential increases substantially linearly.

An emitter of the pnp transistor is capable of increasing up to the maximum output of the amplifier, and is balanced in a state before reaching the maximum amplitude at a normal operation of the switching power source. In such a case, a base potential exceeds an equilibrium potential thereof, and hence a base of the pnp transistor is reversely biased to be turned off. As a result, the soft start is finished. It is possible to replace the pnp bipolar transistor with a p-type MOS transistor.

As another way, an input terminal is added to two input terminals of the error amplifier, and a voltage which increases gradually is applied, with the result that the output of the amplifier is gradually increased after being fixed to zero potential. FIG. 3 illustrates an example thereof. Reference symbols P2 and P3 denote input terminals of the error amplifier, and reference symbol P1 denotes an input terminal added for a soft start. A gate potential of the input terminal P1 immediately after the power source is turned on is zero, and thus the output of the error amplifier becomes substantially zero. The reference voltage is connected to a gate of the input terminal P2, whereby the output of the error amplifier starts increasing from zero potential when becoming closer to this potential. The clamp circuit has an open loop, and thus the output of the error amplifier does not increase linearly even when a potential of a capacitor C1 linearly increases because an input voltage range of the amplifier is narrow. When the gate potential of the input terminal P1 exceeds the reference voltage, the input terminal P1 is disconnected from the circuit, whereby the soft start is finished.

3. RELATIONSHIP BETWEEN COMPARATOR INPUT AND ERROR AMPLIFIER OUTPUT

In the current mode DC-DC converter, the output of the error amplifier and an output obtained by subjecting a coil current to voltage conversion are compared with each other by the comparator, and then a pulse width PWM is finally determined. Resistors are connected in series with the coil, and a voltage drop thereof may be used for subjecting the coil current to voltage conversion.

However, a circuit needs to be devised because one terminal of a current detection resistor cannot be grounded. The resistor may be inserted between a source of a switching transistor (PMOS) and a power source input, but a level shift circuit for potential is required because zero potential is not used as a reference.

Within the maximum output voltage range of the error amplifier, a normal amplifier operation cannot be performed at zero potential no matter how the circuit is devised. Thus, the operation needs to be started from a certain output bias potential. In the case where the switching current of the coil is zero, an output of the current detection circuit is expected to be zero potential. However, it must be borne in mind that a certain bias potential is included. In the soft start operation for limiting a switching current after the power source is turned on, an output potential of the error amplifier is necessary to be a potential which is lower than an output potential of the coil current circuit. For this reason, 1 V or more is normally supplied as a bias potential of the output of the current circuit.

FIGS. 4 illustrate the output of the error amplifier, the output of the coil current circuit, and a switching current waveform of the coil. In this example, a potential difference between the output of the error amplifier and the output of the coil current circuit was made to be 60 mV. This value is 1/20 compared with the case where the bias potential is 1.2 V.

4. SOFT START TIME

There arises no particular problem, in the switching power source of an application circuit which causes no problem even when the soft start time is several tens of ms, when the bias potential of the output of the coil current circuit is set to be 1 V or larger. However, in the case where the short soft start time is required and an input power source voltage is limited to be low, the potential difference between the output of the error amplifier and the output of the current detection circuit is preferably as small as possible because an ineffective time is short. In the present invention, there was used a voltage generating circuit for generating a stable and accurate potential difference therebetween which is not affected by a load current, a fluctuation in input power supply voltage, an operating temperature range, an IC manufacturing process, and the like.

5. HIGHLY ACCURATE DIFFERENTIAL VOLTAGE GENERATING CIRCUIT

FIG. 5 illustrates a highly accurate differential voltage generating circuit. From a reference voltage, an operational amplifier, a MOS transistor M1, and a resistor R1, a drain current IM₁ of the MOS transistor M1 is:

IM ₁ =V _(REF) /R ₁   (1)

When a current mirror ratio between a current mirror circuit formed of MOS transistors M11 and M12 and a current mirror circuit formed of MOS transistors M2 and M3 is n, a drain current IM3 of the MOS transistor M3 is:

IM ₃=(V _(REF) /R ₁)n   (2)

When a source potential of a MOS transistor M4 and a drain potential of the MOS transistor M3 are V₂ and V₁, respectively, a terminal voltage (V₂−V₁) of a resistor R₂ is:

V _(i −V) ₁ =V _(REF)(R ₂ /R ₁)n   (3)

Equation (3) is determined by the reference voltage and a resistance ratio R₂/R₁, and thus a potential which does not have dependence on input power source voltage, temperature, or process and has a stable difference can be generated. The source potential V₂ is a potential obtained by subtracting a voltage V_(GS) between a gate and a source of the MOS transistor M4 from the reference voltage. In the normal CMOS process, an absolute value of the resistance cannot be controlled with high accuracy, and hence the source potential V₂ varies greatly and also has large temperature characteristics. However, in the current mode PWM, the output of the error amplifier is compared with the output of the coil current circuit, and thus the absolute value thereof is not important. A peak current of the coil is converted into a voltage by a current-voltage conversion circuit. In the case where a gain of the coil current is 1/1,000, when the peak current of the coil is 1 A, the gain becomes 1/1,000 of 1 A, 1 mA, and 1 V is obtained when 1 mA is caused to flow through the resistor having 1 KΩ. This voltage is the output of the coil current circuit. Accordingly, the peak current of the coil is 100 mA in the case of 100 mV. When offset voltages of the CMOS amplifier and the comparator, and offset voltages of the current detection circuit and the current-voltage conversion adding circuit are estimated at 10 mV at a maximum, V₂−V₁=50 mV can be made as a design target. In this study, the design was made by 60 mV.

6. BLOCK DIAGRAM

FIG. 6 is a block diagram of a current mode DC-DC converter, which is proposed here, formed of the highly accurate differential voltage generating circuit using the soft start for the reference voltage source and a variable soft start for clamping the error amplifier.

As the current detection circuit and the current-voltage conversion circuit, those described in Reference (2) were used. Components denoted by reference symbols I_(SLOPE), M₄, and Cslope form a slope compensation circuit which suppresses a harmonic specific to the current mode (see Reference (7)), which is generated when a duty cycle of the PWM is 50% or more. The source potential of the MOS transistor M4 is denoted by V₂. Reference symbols U1 and U2 denote an error amplifier and a clamp amplifier, respectively, and components denoted by reference symbols Isoft, M₃, and Css form a soft start ramp generating circuit. A source potential of the MOS transistor M3 is denoted by V₁. In this study, V₂−V₁=60 mV.

7. ERROR AMPLIFIER CLAMP CIRCUIT

An output current source is shared between the error amplifier and the clamp amplifier. FIG. 7 illustrates the clamp circuit of the error amplifier. An output voltage of the error amplifier rises while being clamped in accordance with the soft start voltage. An output stage current source is shared between the error amplifier and the clamp amplifier. The clamp circuit has a voltage follower circuit configuration, and thus an output of the error amplifier rises at the same slope as that of the soft start ramp voltage. A potential difference between the reference voltage and the output voltage which is subjected to feedback becomes small right before the output of the switching power source is balanced, and the error amplifier starts a linear operation. When the output of the switching power source is balanced and an input potential difference of the error amplifier gets closer to zero as much as possible, a current at the output stage of the error amplifier increases. For this reason, the current at the output stage of the voltage follower which serves as the clamp circuit is limited and is finally turned off, whereby the voltage follower is completely disconnected from the error amplifier. In the present invention, this clamp circuit was used for a soft start.

8. COIL CURRENT DETECTION CIRCUIT REF. (2)

FIG. 8 illustrates a coil current-voltage conversion circuit. When a voltage between a drain and a source is identical in two PMOSs having a W/L ratio of N:1, a drain current ratio becomes exactly N:1. In order to realize this relationship, an operational amplifier was used. Reference symbols V_(A) and V_(B) each denote an input of the amplifier, and thus a voltage of a difference therebetween is 1/A(s). It becomes possible to use a polysilicon resistor as a current sense resistor by reducing coil current information to N:1 with the use of a wideband operational amplifier.

9. VOLTAGE-CURRENT CONVERSION ADDING CIRCUIT REF (1)

FIG. 9 illustrates a voltage-current conversion adding circuit. Two voltage-current conversion circuits are used to add a coil current and a slope compensation current. A resistor is connected to a MOS transistor M8, whereby voltage conversion is performed. The output voltage is compared with an output voltage of an error amplifier by a comparator. An input portion of the voltage-current conversion adding circuit has the mirror circuits formed with the identical W/L, and thus VT of the PMOS to which a voltage is input and temperature characteristics thereof are cancelled.

10. REFERENCE VOLTAGE AND RAMP VOLTAGE OF ERROR AMPLIFIER

The ineffective time of the soft start could be dramatically reduced through the adoption of the highly accurate differential voltage generating circuit. In the current mode PWM converter, the peak current needs to be increased so that an average current of the coil is equal to the load current when the load current increases. In order to increase the peak current of the coil, the output voltage of the error amplifier needs to be increased so as to be equal to a peak voltage subjected to coil current-voltage conversion. The clamp voltage of the error amplifier rises linearly with respect to a temporal axis when a constant current is caused to flow through the capacitor. The output voltage of the error amplifier, which is required when the maximum load current value is defined, is determined through a negative feedback loop. In the case where a target value of the soft start time is set in advance, a slope of the clamp voltage of the error amplifier EA_SS=dv/dt is determined. When the peak current of the coil is 1 A, a sense resistance is 1 mΩ, and a gain of the current sense amplifier is 1,000, a coil current-voltage conversion output VSENSE is as follows:

VSENSE=(0.001) (1,000)=1 v

When a target of the soft start time is 200 uS, EA_SS=1 v/200 uS=0.005/uS=5 mV/uS.

In other words, the output of the error amplifier rises by 5 mV for 1 uS. When 5 mV is converted to the coil peak current, it corresponds to 5 mA. In the case where a PWM switching frequency is assumed to 1 MHz, the coil peak current increases by 5 mA for each switching cycle. In the case where the load current of the power source is extremely small, it is estimated that an overshoot occurs in the output voltage when the average current of the coil increases by 5 mA for each switching cycle. Accordingly, EA_SS=dv/dt which is smaller by one digit or more is normally set. In this case, the soft start time becomes 2 mS or more. In order to solve the above-mentioned dilemma, in the present invention, a circuit which increases for a short time a small slope dv/dt of the error amplifier with a lapse of time is used in combination with ramping up of the reference voltage, with the result that a substantially constant soft start time could be achieved from a light load to the maximum load current. When the reference voltage is ramped up, a value of the reference voltage is smaller compared with the final output voltage even if the ramp voltage of the error amplifier rises. Accordingly, an overshoot does not occur in the power supply. According to the simulation, the soft start time within 150 uS could be achieved.

11. REFERENCE VOLTAGE AND RAMP VOLTAGE GENERATING CIRCUIT FOR ERROR AMPLIFIER

A bandgap reference voltage output (BG VREF) rises substantially linearly from zero to a voltage which is divided by resistors R1 and R2 along with a rise of a voltage between a gate and a source of a MOS transistor M1. A reference symbol I1 denotes a constant current source, and a current mirror is formed of MOS transistors M11 to M14 with W/L of a MOS transistor M15 as a reference. MOS transistors M4 and M5 are controlled by outputs of a comparator Comp2 and a comparator Comp1, respectively, and add drain currents of the MOS transistors M13 and M14, respectively. Capacitors C1 and C2 are charged linearly by constant current circuits M11 and M12. MOS transistors M2 and M3 prohibit charging of the capacitors C1 and C2 until under voltage lock-out (UVLO) is released. Potentials divided by resistors R3, R4, and R5 are compared with VREF_SS, and the comparators are sequentially reversed, with the result that a charge current value of the capacitor C2 is increased.

FIGS. 11 illustrate an example in which the reference voltage is 400 mV. A soft start voltage of the error amplifier has three different inclined slopes, and the output voltage of the error amplifier, which is necessary in the case of a large load current, has reached within 150 uS. Accordingly, soft start characteristics which do not depend on the load current can be obtained.

12. SIMULATION RESULTS

Equilibrium time Output voltage Output current Circuit proposed 0.14 ms   @ 0.8 V 0 to 0.75 A Model A 2.4 ms   @ 1.2 V 3 A Model B 7 ms @ 2.5 V 15 A Model C 4 ms @ 0.8 V N/A Model D 4 ms @ 1.2 V N/A Model E 8 ms @ 2.5 V 0.3 A Model F 4 ms @ 2.5 V 13.8 A

14. CONCLUSION

According to the system configuration formed of the error amplifier variable soft start circuit, the coil current-voltage conversion circuit, the voltage-current conversion adding circuit, and the highly accurate differential voltage generating circuit using the reference voltage soft start, an input inrush current and an output overshoot of the current mode PWM DC-DC converter was reduced, whereby the soft start time could be shortened by 1/10 or more compared with the conventional case. The simulation results of the soft start time on the circuit proposed in the present invention did not depend on the load current value, which were 150 uS or smaller. 

1. A switching regulator for converting an input voltage, which is input to an input terminal thereof, into a predetermined constant voltage and outputting the predetermined constant voltage as an output voltage from an output terminal thereof, comprising: a switching element; a coil which is charged with the input voltage through switching of the switching element; a switch circuit for switching the switching element; another coil which is charged with the input voltage through the switching of the switching circuit; an error amplifier for amplifying a voltage difference between the output voltage and a reference voltage and outputting an error signal; a soft start circuit for, when the switching regulator is activated, clamping the error signal by a ramp voltage to be output and causing the ramp voltage to have a voltage value of the error signal in a predetermined period of time; a triangular wave generator for generating a triangular wave; and a control circuit unit for comparing the ramp voltage with a voltage of the triangular waver and outputting a pulse signal indicating a result of the comparing to the switch circuit to perform switching control on the switching circuit, wherein, when the switching regulator is activated, the soft start circuit increases the reference voltage to a predetermined voltage value for the predetermined period of time, and the predetermined period of time is divided into a plurality of segments to increase the ramp voltage at slopes which are different for each of the plurality of segments.
 2. A switching regulator according to claim 1, wherein: when the switching regulator is activated, the soft start circuit increases the reference voltage at a predetermined angle; the soft start circuit includes, as constant current power sources for which different thresholds are set, a plurality of constant current power sources for feeding a constant current when a voltage input thereto exceeds a threshold; and when the reference voltage increases to exceed thresholds of a larger number of the plurality of constant current power sources, and thus the larger number of the plurality of constant current power sources operate, the soft start circuit adds current values of the operating constant current power sources and converts the added current values into a voltage value to generate the slopes which are different for each of the plurality of segments within the predetermined period of time.
 3. A switching regulator according to claim 2, wherein, when the switching regulator is activated, the soft start circuit starts charging a first capacitor with a current of a constant current power source for reference voltage to gradually increase the reference voltage.
 4. A switching regulator according to claim 3, wherein: the plurality of constant current power sources each include: a switching element connected in series therewith; and a comparator corresponding thereto; the comparator comprises one input terminal input with a voltage having a threshold which is different among the comparators of the plurality of constant current power sources, and another input terminal input with the reference voltage; and when the reference voltage exceeds the threshold, the comparator outputs an on-signal to the switching element corresponding to the comparator, and the corresponding constant current power source outputs a current.
 5. A switching regulator according to any one of claims 2, wherein, when output currents of the plurality of constant current power sources are added and are charged into a second capacitor, the ramp voltage is generated. 